The field of the invention generally relates to digital phase detectors, and more particularly relates to digital detectors used in the detection of digital samples of an analog signal having a substantially linear synchronization region wherein subclock detection resolution is desirable.
As is well known, phase detectors generally compare the relative phase relationship of two signals, e.g., a reference signal and a secondary signal. Typically, a phase detector is combined with a low pass filter to provide an output signal having an amplitude related to the phase difference of the input signals.
One common application of a phase detector is in a phase locked loop wherein a locally generated signal is synchronized with a reference signal. The local signal may be generated by a voltage controlled oscillator or VCO which is controlled by the output signal of the phase detector. The reference signal or some subsignal thereof is applied to one input of the phase detector and the VCO or some subsignal thereof is applied to a second input of the phase detector. For the condition of the two signals being out of phase, the phase detector output will be of such amplitude to cause the VCO to increase or decrease in frequency tending to bring its output signal in coincidence with the reference.
In one specific phase detection application commonly referred to genlocking, the reference signal is a video signal such as a standard PAL or NTSC television signal, and a sync detector is used to provide an output signal in coincidence with the horizontal line sync pulse. For example, a threshold signal is typically set to the mid-level of the horizontal sync pulse transition, and the sync detector provides an output signal when the video signal crosses the threshold. In one arrangement, a device responsive to a VCO output is used to generate a local sync signal corresponding to the sync detector output, and the relative phase of these two corresponding sync signals is phase detected to provide a control signal used in a phase locked loop to control the VCO. In such manner, the local VCO is synchronized to the incoming video signal.
In the above described arrangement and others, infinite resolution is theoretically provided by an analog sync detector, or more generally a phase detector in a phase locked loop. In particular, when a voltage comparator is used and the inputs are the analog video signal and a threshold voltage, the resolution of the output is theoretically infinite. Stated differently, the output always occurs at the same relationship between the analog video signal and the threshold voltage, so the exact time that the analog video signal crosses the threshold can readily be determined. However, with a digital sync detector, the phase detecting resolution is finite as determined by the time interval between samples. In particular, the threshold voltage is converted to a digital threshold value to which the values of the digital samples are compared. When a sequence of digital samples are of greater (or lesser) value than the threshold value, and then one sample is detected with lesser (or greater) value than the threshold value, it is known that the digital threshold value has been crossed. However, the exact time of crossing--or more precisely, the exact time of the analog signal crossing the threshold voltage--is not known. Viewed simply, the time that the digitized video signal crossed the threshold is not infinitely resolved because the crossing could have occurred at any time within the time interval between two successive samples, one occurring before and the other occurring after the crossing. Therefore, in the above described application and others, the VCO output can jitter as the relative position of the threshold value within sample intervals varies from sync pulse to sync pulse. One way to increase the resolution within the digital phase locked loop is to increase the sample rate so that the time interval between samples is reduced. However, the sample clock frequency may be constrained by other parameters of the system.